This invention relates to memory circuits, and more particularly to memory circuits of the type known as content-addressable memories.
A content-addressable memory (xe2x80x9cCAMxe2x80x9d) is a memory that can store a plurality of different data words in respective different address locations in the memory. When a search data word is applied to the CAM, the CAM outputs the address of the location (if any) in the CAM that contains that data word, or the CAM may output a simple xe2x80x9cmatchxe2x80x9d signal. CAMs are also sometimes referred to as associative memories, but CAM is the term chosen for use herein.
Many programmable logic device integrated circuits (xe2x80x9cPLDsxe2x80x9d) include blocks of memory that can be used in any of several different ways. For example, such memory blocks may be usable as single- or multi-port random access memory (xe2x80x9cRAMxe2x80x9d), read-only memory (xe2x80x9cROMxe2x80x9d), or product-term (xe2x80x9cPtermxe2x80x9d) logic, etc. (See, for example, Heile U.S. Pat. No. 6,020,759.) It is even known to give such memory blocks the capability of optionally operating as CAMs. (See, for example, Heile U.S. Pat. No. 6,144,573.) Although significant, the demand for CAM capability tends to be less than the demand for other types of memory capability, so it can be uneconomical to include, in a PLD, circuitry that is dedicated to supporting CAM capability. Also, it can be difficult or impossible to provide such dedicated circuitry that is capable of efficiently supporting very large CAMs and/or CAMs requiring changes to the data stored in the CAM.
In view of the foregoing, one aspect of the present invention relates to using circuitry on a PLD that does not include dedicated CAM capability to allow the PLD to emulate a CAM. The invention will be illustratively described primarily in such a PLD context. But it will be understood that the invention is also applicable to emulating CAM capability in other contexts, such as in application-specific integrated circuits (xe2x80x9cASICsxe2x80x9d) that include suitable memory resources (e.g., RAM or ROM) and systems that include multiple integrated circuits (e.g., systems that include multiple RAM or ROM chips).
In accordance with the present invention CAMs are implemented in PLDs by configuring (i.e., programming) the PLD to emulate the required CAM. The CAM data is stored in memory blocks in the PLD. The programmable logic of the PLD is used to control such functions as storage of the CAM data in the memory blocks, retrieval of the CAM data from the memory blocks for comparison to search data, and the actual comparisons of CAM data and search data. As part of the storage of CAM data in the memory blocks, the programmable logic of the PLD may convert CAM addresses to actual memory block addresses. Similarly, as part of the retrieval of CAM data from the memory blocks and comparison of that data to search data, the programmable logic of the PLD may convert the actual memory block address of CAM data that matches the search data to a CAM address. Time-division multiplexing (xe2x80x9cTDMxe2x80x9d) may be used in comparing the CAM data to the search data. Circuitry on the PLD (e.g., phase locked loop (xe2x80x9cPLLxe2x80x9d) circuitry and programmable logic circuitry) may be used to provide a faster clock signal for use in these TDM operations. In each cycle of the faster clock signal, multiple CAM data words may be retrieved in parallel from the memory blocks and compared in parallel to the search data.
As an alternative to the foregoing, the invention may be similarly applied to other circuitry having memory blocks generally like those on a PLD as described above. Such other circuitry may be an ASIC or a system including multiple memory chips (integrated circuits).
Further features of the invention, its nature and various advantages will be more apparent from the accompanying drawings and the following detailed description.